# Reading D:/altera/13.0/modelsim_ae/tcl/vsim/pref.tcl 
# ERROR: No extended dataflow license exists
# do lcd1602_run_msim_rtl_verilog.do 
# if {[file exists rtl_work]} {
# 	vdel -lib rtl_work -all
# }
# vlib rtl_work
# vmap work rtl_work
# Copying D:\altera\13.0\modelsim_ae\win32aloem/../modelsim.ini to modelsim.ini
# Modifying modelsim.ini
# ** Warning: Copied D:\altera\13.0\modelsim_ae\win32aloem/../modelsim.ini to modelsim.ini.
#          Updated modelsim.ini.
# 
# vlog -vlog01compat -work work +incdir+D:/fpga/class2017/20170729002/lcd1602 {D:/fpga/class2017/20170729002/lcd1602/lcd1602_driver.v}
# Model Technology ModelSim ALTERA vlog 10.1d Compiler 2012.11 Nov  2 2012
# -- Compiling module lcd1602_driver
# 
# Top level modules:
# 	lcd1602_driver
# vlog -vlog01compat -work work +incdir+D:/fpga/class2017/20170729002/lcd1602 {D:/fpga/class2017/20170729002/lcd1602/lcd1602_ctrl.v}
# Model Technology ModelSim ALTERA vlog 10.1d Compiler 2012.11 Nov  2 2012
# -- Compiling module lcd1602_ctrl
# 
# Top level modules:
# 	lcd1602_ctrl
# 
# vlog -vlog01compat -work work +incdir+D:/fpga/class2017/20170729002/lcd1602 {D:/fpga/class2017/20170729002/lcd1602/lcd1602_ctrl_tb.v}
# Model Technology ModelSim ALTERA vlog 10.1d Compiler 2012.11 Nov  2 2012
# -- Compiling module lcd1602_ctrl_tb
# 
# Top level modules:
# 	lcd1602_ctrl_tb
# 
# vsim -t 1ps -L altera_ver -L lpm_ver -L sgate_ver -L altera_mf_ver -L altera_lnsim_ver -L cycloneive_ver -L rtl_work -L work -voptargs="+acc"  lcd1602_ctrl_tb
# vsim -L altera_ver -L lpm_ver -L sgate_ver -L altera_mf_ver -L altera_lnsim_ver -L cycloneive_ver -L rtl_work -L work -voptargs=\"+acc\" -t 1ps lcd1602_ctrl_tb 
# //  ModelSim ALTERA 10.1d Nov  2 2012 
# //
# //  Copyright 1991-2012 Mentor Graphics Corporation
# //  All Rights Reserved.
# //
# //  THIS WORK CONTAINS TRADE SECRET AND PROPRIETARY INFORMATION
# //  WHICH IS THE PROPERTY OF MENTOR GRAPHICS CORPORATION OR ITS
# //  LICENSORS AND IS SUBJECT TO LICENSE TERMS.
# //
# Loading work.lcd1602_ctrl_tb
# Loading work.lcd1602_ctrl
# Loading work.lcd1602_driver
# ** Warning: (vsim-3017) D:/fpga/class2017/20170729002/lcd1602/lcd1602_ctrl_tb.v(33): [TFMPC] - Too few port connections. Expected 13, found 12.
# 
#         Region: /lcd1602_ctrl_tb/lcd1602_ctrl
# ** Warning: (vsim-3722) D:/fpga/class2017/20170729002/lcd1602/lcd1602_ctrl_tb.v(33): [TFMPC] - Missing connection for port 'LCD1602_VL'.
# 
# 
# add wave *
# view structure
# .main_pane.structure.interior.cs.body.struct
# view signals
# .main_pane.objects.interior.cs.body.tree
# run -all
# Break key hit 
# Break in Module lcd1602_ctrl_tb at D:/fpga/class2017/20170729002/lcd1602/lcd1602_ctrl_tb.v line 37
# Simulation Breakpoint: Break in Module lcd1602_ctrl_tb at D:/fpga/class2017/20170729002/lcd1602/lcd1602_ctrl_tb.v line 37
# MACRO ./lcd1602_run_msim_rtl_verilog.do PAUSED at line 18
run -all
# Break in Module lcd1602_ctrl_tb at D:/fpga/class2017/20170729002/lcd1602/lcd1602_ctrl_tb.v line 83
# Simulation Breakpoint: Break in Module lcd1602_ctrl_tb at D:/fpga/class2017/20170729002/lcd1602/lcd1602_ctrl_tb.v line 83
# MACRO ./lcd1602_run_msim_rtl_verilog.do PAUSED at line 18
