| Hierarchy |
Input |
Constant Input |
Unused Input |
Floating Input |
Output |
Constant Output |
Unused Output |
Floating Output |
Bidir |
Constant Bidir |
Unused Bidir |
Input only Bidir |
Output only Bidir |
| uart_tx_inst |
14 |
0 |
0 |
0 |
2 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| uart_rx_inst |
6 |
0 |
0 |
0 |
9 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| cmd_analysis_inst|fifo_r_inst|scfifo_component|auto_generated|dpfifo|wr_ptr |
4 |
0 |
0 |
0 |
8 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| cmd_analysis_inst|fifo_r_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count |
4 |
0 |
0 |
0 |
8 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| cmd_analysis_inst|fifo_r_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1 |
28 |
0 |
0 |
0 |
8 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| cmd_analysis_inst|fifo_r_inst|scfifo_component|auto_generated|dpfifo|FIFOram |
28 |
0 |
0 |
0 |
8 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| cmd_analysis_inst|fifo_r_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw |
5 |
0 |
0 |
0 |
8 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| cmd_analysis_inst|fifo_r_inst|scfifo_component|auto_generated|dpfifo|fifo_state |
5 |
0 |
0 |
0 |
10 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| cmd_analysis_inst|fifo_r_inst|scfifo_component|auto_generated|dpfifo |
12 |
0 |
0 |
0 |
16 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| cmd_analysis_inst|fifo_r_inst|scfifo_component|auto_generated |
11 |
0 |
0 |
0 |
16 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| cmd_analysis_inst|fifo_r_inst |
11 |
0 |
0 |
0 |
16 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| cmd_analysis_inst|fifo_w_inst|scfifo_component|auto_generated|dpfifo|wr_ptr |
4 |
0 |
0 |
0 |
8 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| cmd_analysis_inst|fifo_w_inst|scfifo_component|auto_generated|dpfifo|rd_ptr_count |
4 |
0 |
0 |
0 |
8 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| cmd_analysis_inst|fifo_w_inst|scfifo_component|auto_generated|dpfifo|FIFOram|altsyncram1 |
28 |
0 |
0 |
0 |
8 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| cmd_analysis_inst|fifo_w_inst|scfifo_component|auto_generated|dpfifo|FIFOram |
28 |
0 |
0 |
0 |
8 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| cmd_analysis_inst|fifo_w_inst|scfifo_component|auto_generated|dpfifo|fifo_state|count_usedw |
5 |
0 |
0 |
0 |
8 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| cmd_analysis_inst|fifo_w_inst|scfifo_component|auto_generated|dpfifo|fifo_state |
5 |
0 |
0 |
0 |
10 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| cmd_analysis_inst|fifo_w_inst|scfifo_component|auto_generated|dpfifo |
12 |
0 |
0 |
0 |
16 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| cmd_analysis_inst|fifo_w_inst|scfifo_component|auto_generated |
11 |
0 |
0 |
0 |
16 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| cmd_analysis_inst|fifo_w_inst |
11 |
0 |
0 |
0 |
16 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| cmd_analysis_inst |
23 |
0 |
0 |
0 |
53 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| iic_ctrl_inst |
45 |
0 |
0 |
0 |
12 |
0 |
0 |
0 |
1 |
0 |
0 |
0 |
0 |