#==============================================================
# Despcription: IP parameters and instantiation
#==============================================================

module xsIP_DIVIDER (rst, clk, divider_en, din_vld, dividend, divisor, result_vld, quotient, remainder);
    input rst;
    input clk;
    input divider_en;
    input din_vld;
    input [8:0] dividend;
    input [8:0] divisor;
    output result_vld;
    output [8:0] quotient;
    output [8:0] remainder;

    supply1 ipgen_VCC;
    supply0 ipgen_GND;

    // < - IP instantiation definition -> //
    xsIP_divider_pp    xsIP_divider_pp_inst(
        .rst(rst),
        .clk(clk),
        .divider_en(divider_en),
        .din_vld(din_vld),
        .dividend(dividend),
        .divisor(divisor),
        .result_vld(result_vld),
        .quotient(quotient),
        .remainder(remainder)
    );
    defparam    xsIP_divider_pp_inst.DIVIDEND_SIGNED = 0;
    defparam    xsIP_divider_pp_inst.DIVIDEND_WIDTH = 9;
    defparam    xsIP_divider_pp_inst.DIVISOR_SIGNED = 0;
    defparam    xsIP_divider_pp_inst.DIVISOR_WIDTH = 9;
    defparam    xsIP_divider_pp_inst.PIP_STEP_LEN = 1;

endmodule