Info: Լ ....
Info: bank 5 vccio3.3V.
Info: .
Info: (nl.sweep) ʼ ....
Info:  0 ڵ㱻 nl.sweep ɾ.
Info: (nl.sweep) .
WARN(NCHK315): Ԫ key_filter/key_in_sync1_reg 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ key_filter/key_in_sync2_reg 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ key_filter/key_in_reg1_reg 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ key_filter/key_in_reg2_reg 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ key_filter/cnt_full_reg 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ key_filter/en_cnt_reg 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ key_filter/key_state_reg 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ key_filter/state_reg_0 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ key_filter/state_reg_1 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ key_filter/state_reg_3 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ key_filter/state_reg_2 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_rx/uart_rx_sync1_reg 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_rx/uart_rx_sync2_reg 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_rx/uart_rx_reg1_reg 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_rx/uart_rx_reg2_reg 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_rx/bps_clk_reg 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_rx/rx_done_reg 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_rx/data_byte_pre_reg[0][0] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_rx/data_byte_pre_reg[0][1] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_rx/data_byte_pre_reg[0][2] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_rx/data_byte_pre_reg[1][0] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_rx/data_byte_pre_reg[1][1] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_rx/data_byte_pre_reg[1][2] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_rx/data_byte_pre_reg[2][0] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_rx/data_byte_pre_reg[2][1] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_rx/data_byte_pre_reg[2][2] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_rx/data_byte_pre_reg[3][0] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_rx/data_byte_pre_reg[3][1] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_rx/data_byte_pre_reg[3][2] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_rx/data_byte_pre_reg[4][0] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_rx/data_byte_pre_reg[4][1] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_rx/data_byte_pre_reg[4][2] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_rx/data_byte_pre_reg[5][0] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_rx/data_byte_pre_reg[5][1] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_rx/data_byte_pre_reg[5][2] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_rx/data_byte_pre_reg[6][0] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_rx/data_byte_pre_reg[6][1] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_rx/data_byte_pre_reg[6][2] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_rx/data_byte_pre_reg[7][0] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_rx/data_byte_pre_reg[7][1] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_rx/data_byte_pre_reg[7][2] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_rx/data_byte_reg[0] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_rx/data_byte_reg[1] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_rx/data_byte_reg[2] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_rx/data_byte_reg[3] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_rx/data_byte_reg[4] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_rx/data_byte_reg[5] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_rx/data_byte_reg[6] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_rx/data_byte_reg[7] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_rx/uart_state_reg 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_rx/div_cnt_reg[15] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_rx/div_cnt_reg[14] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_rx/div_cnt_reg[13] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_rx/div_cnt_reg[12] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_rx/div_cnt_reg[11] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_rx/div_cnt_reg[10] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_rx/div_cnt_reg[9] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_rx/div_cnt_reg[8] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_rx/div_cnt_reg[7] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_rx/div_cnt_reg[6] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_rx/div_cnt_reg[5] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_rx/div_cnt_reg[4] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_rx/div_cnt_reg[3] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_rx/div_cnt_reg[2] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_rx/div_cnt_reg[1] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_rx/div_cnt_reg[0] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_rx/bps_cnt_reg[7] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_rx/bps_cnt_reg[6] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_rx/bps_cnt_reg[5] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_rx/bps_cnt_reg[4] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_rx/bps_cnt_reg[3] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_rx/bps_cnt_reg[2] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_rx/bps_cnt_reg[1] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_rx/bps_cnt_reg[0] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_rx/START_BIT_reg[2] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_rx/START_BIT_reg[1] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_rx/START_BIT_reg[0] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_rx/STOP_BIT_reg[2] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_rx/STOP_BIT_reg[1] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_rx/STOP_BIT_reg[0] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_tx/bps_clk_reg 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_tx/tx_done_reg 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_tx/data_byte_reg_reg[0] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_tx/data_byte_reg_reg[1] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_tx/data_byte_reg_reg[2] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_tx/data_byte_reg_reg[3] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_tx/data_byte_reg_reg[4] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_tx/data_byte_reg_reg[5] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_tx/uart_state_reg 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_tx/uart_tx_reg 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_tx/div_cnt_reg[15] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_tx/div_cnt_reg[14] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_tx/div_cnt_reg[13] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_tx/div_cnt_reg[12] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_tx/div_cnt_reg[11] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_tx/div_cnt_reg[10] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_tx/div_cnt_reg[9] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_tx/div_cnt_reg[8] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_tx/div_cnt_reg[7] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_tx/div_cnt_reg[6] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_tx/div_cnt_reg[5] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_tx/div_cnt_reg[4] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_tx/div_cnt_reg[3] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_tx/div_cnt_reg[2] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_tx/div_cnt_reg[1] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_tx/div_cnt_reg[0] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_tx/bps_cnt_reg[3] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_tx/bps_cnt_reg[2] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_tx/bps_cnt_reg[1] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_byte_tx/bps_cnt_reg[0] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/cmd_checked_dly1_reg 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[0] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[1] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[2] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[3] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[4] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[5] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[6] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[7] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[8] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[9] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[10] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[11] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[12] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[13] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[14] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[15] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[16] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[17] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[18] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[19] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[20] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[21] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[22] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[23] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[24] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[25] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[26] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[27] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[28] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[29] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[30] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[31] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[32] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[33] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[34] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[35] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[36] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[37] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[38] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[39] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[40] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[41] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[42] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[43] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[44] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[45] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[46] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[47] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[48] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[49] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[50] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[51] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[52] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[53] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[54] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[55] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[56] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[57] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[58] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[59] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[60] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[61] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[62] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[63] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[64] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[65] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[66] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[67] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[68] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[69] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[70] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[71] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[72] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[73] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[74] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[75] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[76] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[77] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[78] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[79] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[80] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[81] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[82] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[83] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[84] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[85] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[86] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/rx_cmd_data_reg[87] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/set_time_reg 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ uart_adjust_time/set_state_reg 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ time_send_uart/time_data_change_reg 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ time_send_uart/uart_tx_en_pre_reg 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ time_send_uart/uart_tx_en_reg 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ time_send_uart/date_time_latch_reg[0] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ time_send_uart/date_time_latch_reg[1] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ time_send_uart/date_time_latch_reg[2] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ time_send_uart/date_time_latch_reg[3] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ time_send_uart/date_time_latch_reg[4] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ time_send_uart/date_time_latch_reg[5] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ time_send_uart/date_time_latch_reg[6] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ time_send_uart/date_time_latch_reg[8] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ time_send_uart/date_time_latch_reg[9] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ time_send_uart/date_time_latch_reg[10] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ time_send_uart/date_time_latch_reg[11] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ time_send_uart/date_time_latch_reg[12] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ time_send_uart/date_time_latch_reg[13] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ time_send_uart/date_time_latch_reg[14] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ time_send_uart/date_time_latch_reg[16] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ time_send_uart/date_time_latch_reg[17] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ time_send_uart/date_time_latch_reg[18] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ time_send_uart/date_time_latch_reg[19] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ time_send_uart/date_time_latch_reg[20] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ time_send_uart/date_time_latch_reg[21] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ time_send_uart/date_time_latch_reg[24] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ time_send_uart/date_time_latch_reg[25] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ time_send_uart/date_time_latch_reg[26] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ time_send_uart/date_time_latch_reg[27] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ time_send_uart/date_time_latch_reg[28] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ time_send_uart/date_time_latch_reg[29] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ time_send_uart/date_time_latch_reg[32] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ time_send_uart/date_time_latch_reg[33] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ time_send_uart/date_time_latch_reg[34] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ time_send_uart/date_time_latch_reg[35] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ time_send_uart/date_time_latch_reg[36] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ time_send_uart/date_time_latch_reg[40] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ time_send_uart/date_time_latch_reg[41] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ time_send_uart/date_time_latch_reg[42] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ time_send_uart/date_time_latch_reg[43] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ time_send_uart/date_time_latch_reg[44] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ time_send_uart/date_time_latch_reg[45] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ time_send_uart/date_time_latch_reg[46] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ time_send_uart/date_time_latch_reg[47] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ time_send_uart/uart_tx_data_reg[0] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ time_send_uart/uart_tx_data_reg[1] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ time_send_uart/uart_tx_data_reg[2] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ time_send_uart/uart_tx_data_reg[3] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ time_send_uart/uart_tx_data_reg[4] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ time_send_uart/uart_tx_data_reg[5] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ time_send_uart/send_byte_cnt_reg[4] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ time_send_uart/send_byte_cnt_reg[3] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ time_send_uart/send_byte_cnt_reg[2] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ time_send_uart/send_byte_cnt_reg[1] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ time_send_uart/send_byte_cnt_reg[0] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/Read_Done_reg 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/Set_Done_reg 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/rdreg_req_reg 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/wrreg_req_reg 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/init_state_reg 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/cnt_reg[2] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/cnt_reg[1] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/cnt_reg[0] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/state_reg[8] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/state_reg[7] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/state_reg[6] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/state_reg[5] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/state_reg[4] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/state_reg[3] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/state_reg[2] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/state_reg[1] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/state_reg[0] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/i2c_control/Tx_DATA_reg[0] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/i2c_control/Tx_DATA_reg[1] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/i2c_control/Tx_DATA_reg[2] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/i2c_control/Tx_DATA_reg[3] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/i2c_control/Tx_DATA_reg[4] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/i2c_control/Tx_DATA_reg[5] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/i2c_control/Tx_DATA_reg[6] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/i2c_control/Tx_DATA_reg[7] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/i2c_control/Go_reg 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/i2c_control/Cmd_reg[5] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/i2c_control/Cmd_reg[3] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/i2c_control/Cmd_reg[2] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/i2c_control/Cmd_reg[1] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/i2c_control/Cmd_reg[0] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/i2c_control/rddata_reg[7] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/i2c_control/rddata_reg[6] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/i2c_control/rddata_reg[5] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/i2c_control/rddata_reg[4] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/i2c_control/rddata_reg[3] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/i2c_control/rddata_reg[2] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/i2c_control/rddata_reg[1] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/i2c_control/rddata_reg[0] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/i2c_control/state_reg[6] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/i2c_control/state_reg[5] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/i2c_control/state_reg[4] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/i2c_control/state_reg[3] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/i2c_control/state_reg[2] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/i2c_control/state_reg[1] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/i2c_control/state_reg[0] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ hex_top_special_for_rtc/hc595_driver/ds_reg 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ hex_top_special_for_rtc/hc595_driver/sh_cp_reg 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ hex_top_special_for_rtc/hc595_driver/st_cp_reg 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ hex_top_special_for_rtc/hc595_driver/SHCP_EDGE_CNT_reg[5] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ hex_top_special_for_rtc/hc595_driver/SHCP_EDGE_CNT_reg[4] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ hex_top_special_for_rtc/hc595_driver/SHCP_EDGE_CNT_reg[3] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ hex_top_special_for_rtc/hc595_driver/SHCP_EDGE_CNT_reg[2] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ hex_top_special_for_rtc/hc595_driver/SHCP_EDGE_CNT_reg[1] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ hex_top_special_for_rtc/hc595_driver/SHCP_EDGE_CNT_reg[0] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ hex_top_special_for_rtc/hex8_special_for_rtc/clk_1K_reg 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ hex_top_special_for_rtc/hex8_special_for_rtc/divider_cnt_reg[14] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ hex_top_special_for_rtc/hex8_special_for_rtc/divider_cnt_reg[13] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ hex_top_special_for_rtc/hex8_special_for_rtc/divider_cnt_reg[12] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ hex_top_special_for_rtc/hex8_special_for_rtc/divider_cnt_reg[11] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ hex_top_special_for_rtc/hex8_special_for_rtc/divider_cnt_reg[10] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ hex_top_special_for_rtc/hex8_special_for_rtc/divider_cnt_reg[9] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ hex_top_special_for_rtc/hex8_special_for_rtc/divider_cnt_reg[8] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ hex_top_special_for_rtc/hex8_special_for_rtc/divider_cnt_reg[7] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ hex_top_special_for_rtc/hex8_special_for_rtc/divider_cnt_reg[6] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ hex_top_special_for_rtc/hex8_special_for_rtc/divider_cnt_reg[5] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ hex_top_special_for_rtc/hex8_special_for_rtc/divider_cnt_reg[4] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ hex_top_special_for_rtc/hex8_special_for_rtc/divider_cnt_reg[3] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ hex_top_special_for_rtc/hex8_special_for_rtc/divider_cnt_reg[2] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ hex_top_special_for_rtc/hex8_special_for_rtc/divider_cnt_reg[1] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ hex_top_special_for_rtc/hex8_special_for_rtc/divider_cnt_reg[0] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ hex_top_special_for_rtc/hex8_special_for_rtc/sel_r_reg[7] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ hex_top_special_for_rtc/hex8_special_for_rtc/sel_r_reg[6] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ hex_top_special_for_rtc/hex8_special_for_rtc/sel_r_reg[5] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ hex_top_special_for_rtc/hex8_special_for_rtc/sel_r_reg[4] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ hex_top_special_for_rtc/hex8_special_for_rtc/sel_r_reg[3] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ hex_top_special_for_rtc/hex8_special_for_rtc/sel_r_reg[2] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ hex_top_special_for_rtc/hex8_special_for_rtc/sel_r_reg[1] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ hex_top_special_for_rtc/hex8_special_for_rtc/sel_r_reg[0] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ read_tcnt_acc/Q2/Q_reg[25] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ read_tcnt_acc/Q2/Q_reg[24] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ read_tcnt_acc/Q2/Q_reg[23] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ read_tcnt_acc/Q2/Q_reg[22] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ read_tcnt_acc/Q2/Q_reg[21] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ read_tcnt_acc/Q2/Q_reg[20] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ read_tcnt_acc/Q2/Q_reg[19] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ read_tcnt_acc/Q2/Q_reg[18] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ read_tcnt_acc/Q2/Q_reg[17] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ read_tcnt_acc/Q2/Q_reg[16] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ read_tcnt_acc/Q2/Q_reg[15] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ read_tcnt_acc/Q2/Q_reg[14] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ read_tcnt_acc/Q2/Q_reg[13] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ read_tcnt_acc/Q2/Q_reg[12] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ read_tcnt_acc/Q2/Q_reg[11] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ read_tcnt_acc/Q2/Q_reg[10] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ read_tcnt_acc/Q2/Q_reg[9] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ read_tcnt_acc/Q2/Q_reg[8] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ read_tcnt_acc/Q2/Q_reg[7] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ read_tcnt_acc/Q2/Q_reg[6] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ read_tcnt_acc/Q2/Q_reg[5] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ read_tcnt_acc/Q2/Q_reg[4] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ read_tcnt_acc/Q2/Q_reg[3] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ read_tcnt_acc/Q2/Q_reg[2] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ read_tcnt_acc/Q2/Q_reg[1] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ read_tcnt_acc/Q2/Q_reg[0] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ key_filter/cnt_acc/Q0/Q_reg[19] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ key_filter/cnt_acc/Q0/Q_reg[18] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ key_filter/cnt_acc/Q0/Q_reg[17] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ key_filter/cnt_acc/Q0/Q_reg[16] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ key_filter/cnt_acc/Q0/Q_reg[15] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ key_filter/cnt_acc/Q0/Q_reg[14] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ key_filter/cnt_acc/Q0/Q_reg[13] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ key_filter/cnt_acc/Q0/Q_reg[12] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ key_filter/cnt_acc/Q0/Q_reg[11] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ key_filter/cnt_acc/Q0/Q_reg[10] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ key_filter/cnt_acc/Q0/Q_reg[9] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ key_filter/cnt_acc/Q0/Q_reg[8] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ key_filter/cnt_acc/Q0/Q_reg[7] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ key_filter/cnt_acc/Q0/Q_reg[6] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ key_filter/cnt_acc/Q0/Q_reg[5] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ key_filter/cnt_acc/Q0/Q_reg[4] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ key_filter/cnt_acc/Q0/Q_reg[3] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ key_filter/cnt_acc/Q0/Q_reg[2] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ key_filter/cnt_acc/Q0/Q_reg[1] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ key_filter/cnt_acc/Q0/Q_reg[0] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/i2c_control/i2c_bit_shift/Rx_DATA_reg[0] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/i2c_control/i2c_bit_shift/Rx_DATA_reg[1] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/i2c_control/i2c_bit_shift/Rx_DATA_reg[2] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/i2c_control/i2c_bit_shift/Rx_DATA_reg[3] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/i2c_control/i2c_bit_shift/Rx_DATA_reg[4] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/i2c_control/i2c_bit_shift/Rx_DATA_reg[5] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/i2c_control/i2c_bit_shift/Rx_DATA_reg[6] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/i2c_control/i2c_bit_shift/Rx_DATA_reg[7] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/i2c_control/i2c_bit_shift/cnt_reg[0] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/i2c_control/i2c_bit_shift/cnt_reg[1] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/i2c_control/i2c_bit_shift/cnt_reg[2] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/i2c_control/i2c_bit_shift/cnt_reg[3] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/i2c_control/i2c_bit_shift/cnt_reg[4] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/i2c_control/i2c_bit_shift/Trans_Done_reg 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/i2c_control/i2c_bit_shift/en_div_cnt_reg 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/i2c_control/i2c_bit_shift/i2c_sdat_oe_reg 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/i2c_control/i2c_bit_shift/i2c_sdat_o_reg 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/i2c_control/i2c_bit_shift/div_cnt_reg[19] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/i2c_control/i2c_bit_shift/div_cnt_reg[18] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/i2c_control/i2c_bit_shift/div_cnt_reg[17] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/i2c_control/i2c_bit_shift/div_cnt_reg[16] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/i2c_control/i2c_bit_shift/div_cnt_reg[15] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/i2c_control/i2c_bit_shift/div_cnt_reg[14] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/i2c_control/i2c_bit_shift/div_cnt_reg[13] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/i2c_control/i2c_bit_shift/div_cnt_reg[12] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/i2c_control/i2c_bit_shift/div_cnt_reg[11] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/i2c_control/i2c_bit_shift/div_cnt_reg[10] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/i2c_control/i2c_bit_shift/div_cnt_reg[9] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/i2c_control/i2c_bit_shift/div_cnt_reg[8] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/i2c_control/i2c_bit_shift/div_cnt_reg[7] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/i2c_control/i2c_bit_shift/div_cnt_reg[6] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/i2c_control/i2c_bit_shift/div_cnt_reg[5] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/i2c_control/i2c_bit_shift/div_cnt_reg[4] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/i2c_control/i2c_bit_shift/div_cnt_reg[3] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/i2c_control/i2c_bit_shift/div_cnt_reg[2] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/i2c_control/i2c_bit_shift/div_cnt_reg[1] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/i2c_control/i2c_bit_shift/div_cnt_reg[0] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/i2c_control/i2c_bit_shift/state_reg[6] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/i2c_control/i2c_bit_shift/state_reg[5] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/i2c_control/i2c_bit_shift/state_reg[4] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/i2c_control/i2c_bit_shift/state_reg[3] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/i2c_control/i2c_bit_shift/state_reg[2] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/i2c_control/i2c_bit_shift/state_reg[1] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ pcf8563_ctrl/i2c_control/i2c_bit_shift/state_reg[0] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ hex_top_special_for_rtc/hc595_driver/divider_cnt_acc/Q1/Q_reg[7] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ hex_top_special_for_rtc/hc595_driver/divider_cnt_acc/Q1/Q_reg[6] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ hex_top_special_for_rtc/hc595_driver/divider_cnt_acc/Q1/Q_reg[5] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ hex_top_special_for_rtc/hc595_driver/divider_cnt_acc/Q1/Q_reg[4] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ hex_top_special_for_rtc/hc595_driver/divider_cnt_acc/Q1/Q_reg[3] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ hex_top_special_for_rtc/hc595_driver/divider_cnt_acc/Q1/Q_reg[2] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ hex_top_special_for_rtc/hc595_driver/divider_cnt_acc/Q1/Q_reg[1] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ hex_top_special_for_rtc/hc595_driver/divider_cnt_acc/Q1/Q_reg[0] 첽ƹܽű߼ܱ߼ëӰ.
#=============oOOOo================oOOOo=============
# װ(Packing)
#====================================================
Info: ʼװ(packing).
Info:  pcf8563_ctrl/i2c_control/i2c_bit_shift/Rx_DATA_reg[0] յ IREG.
Info:  key_filter/key_in_sync1_reg յ IREG.
Info:  uart_byte_rx/uart_rx_sync1_reg յ IREG.
Info:  pcf8563_ctrl/Read_Done_reg_dup1 յ OREG.
Info:  uart_byte_tx/uart_tx_reg յ OREG.
Info:  hex_top_special_for_rtc/hc595_driver/sh_cp_reg յ OREG.
Info:  hex_top_special_for_rtc/hc595_driver/st_cp_reg յ OREG.
Info:  hex_top_special_for_rtc/hc595_driver/ds_reg յ OREG.
Info:  pcf8563_ctrl/i2c_control/i2c_bit_shift/i2c_sclk_reg յ OREG.
Info: ʼװԤ.
Info: װԤ.
Info: IOLOGIC                     9.
Info:     IREG_OREG               9.
Info: PIO                        12.
Info: PLL_25K                     1.
Info: SLICEL                     33.
Info:     CARRY                  32.
Info:     MUXF7                   1.
Info: SLICEL(LE)                859.
Info:     LUT                   334.
Info:     LUT REG               255.
Info:     REG                   270.
Info: װ.
Info: Start gpack.
Info: Done gpack.
Info: ʼ.
Info:   Ϊ 12    PIO         .
Info:   Ϊ 9     IOLOGIC     .
Info:   Ϊ 1     PLL_25K     .
Info:   Ϊ 199   SLICEL      .
Info: ɽ.
####
Info: װִʱ : 7 .
Info: 浽ļF:\ac208\Xist_project\XIST_UART\hq_run\uart_rtc8563_hex8_map.rpt.
