# Reading F:/modelsim/modelsim_ase/tcl/vsim/pref.tcl 
# do AC6103_ACM9767_DDS_run_msim_rtl_verilog.do 
# if {[file exists rtl_work]} {
# 	vdel -lib rtl_work -all
# }
# vlib rtl_work
# vmap work rtl_work
# Copying F:\modelsim\modelsim_ase\win32aloem/../modelsim.ini to modelsim.ini
# Modifying modelsim.ini
# ** Warning: Copied F:\modelsim\modelsim_ase\win32aloem/../modelsim.ini to modelsim.ini.
#          Updated modelsim.ini.
# 
# vlog -vlog01compat -work work +incdir+C:/Users/Administrator/Desktop/AC6103_EWAI/AC6103_ACM9767_DDS/prj {C:/Users/Administrator/Desktop/AC6103_EWAI/AC6103_ACM9767_DDS/prj/pll.v}
# Model Technology ModelSim ALTERA vlog 10.1d Compiler 2012.11 Nov  2 2012
# -- Compiling module pll
# 
# Top level modules:
# 	pll
# vlog -vlog01compat -work work +incdir+C:/Users/Administrator/Desktop/AC6103_EWAI/AC6103_ACM9767_DDS/prj {C:/Users/Administrator/Desktop/AC6103_EWAI/AC6103_ACM9767_DDS/prj/ddsrom0.v}
# Model Technology ModelSim ALTERA vlog 10.1d Compiler 2012.11 Nov  2 2012
# -- Compiling module ddsrom0
# 
# Top level modules:
# 	ddsrom0
# vlog -vlog01compat -work work +incdir+C:/Users/Administrator/Desktop/AC6103_EWAI/AC6103_ACM9767_DDS/prj {C:/Users/Administrator/Desktop/AC6103_EWAI/AC6103_ACM9767_DDS/prj/ddsrom1.v}
# Model Technology ModelSim ALTERA vlog 10.1d Compiler 2012.11 Nov  2 2012
# -- Compiling module ddsrom1
# 
# Top level modules:
# 	ddsrom1
# vlog -vlog01compat -work work +incdir+C:/Users/Administrator/Desktop/AC6103_EWAI/AC6103_ACM9767_DDS/prj {C:/Users/Administrator/Desktop/AC6103_EWAI/AC6103_ACM9767_DDS/prj/ddsrom2.v}
# Model Technology ModelSim ALTERA vlog 10.1d Compiler 2012.11 Nov  2 2012
# -- Compiling module ddsrom2
# 
# Top level modules:
# 	ddsrom2
# vlog -vlog01compat -work work +incdir+C:/Users/Administrator/Desktop/AC6103_EWAI/AC6103_ACM9767_DDS/src {C:/Users/Administrator/Desktop/AC6103_EWAI/AC6103_ACM9767_DDS/src/DDS_Module.v}
# Model Technology ModelSim ALTERA vlog 10.1d Compiler 2012.11 Nov  2 2012
# -- Compiling module DDS_Module
# 
# Top level modules:
# 	DDS_Module
# vlog -vlog01compat -work work +incdir+C:/Users/Administrator/Desktop/AC6103_EWAI/AC6103_ACM9767_DDS/src {C:/Users/Administrator/Desktop/AC6103_EWAI/AC6103_ACM9767_DDS/src/edge_check.v}
# Model Technology ModelSim ALTERA vlog 10.1d Compiler 2012.11 Nov  2 2012
# -- Compiling module edge_check
# 
# Top level modules:
# 	edge_check
# vlog -vlog01compat -work work +incdir+C:/Users/Administrator/Desktop/AC6103_EWAI/AC6103_ACM9767_DDS/src {C:/Users/Administrator/Desktop/AC6103_EWAI/AC6103_ACM9767_DDS/src/key_filter.v}
# Model Technology ModelSim ALTERA vlog 10.1d Compiler 2012.11 Nov  2 2012
# -- Compiling module key_filter
# 
# Top level modules:
# 	key_filter
# vlog -vlog01compat -work work +incdir+C:/Users/Administrator/Desktop/AC6103_EWAI/AC6103_ACM9767_DDS/src {C:/Users/Administrator/Desktop/AC6103_EWAI/AC6103_ACM9767_DDS/src/key.v}
# Model Technology ModelSim ALTERA vlog 10.1d Compiler 2012.11 Nov  2 2012
# -- Compiling module key
# 
# Top level modules:
# 	key
# vlog -vlog01compat -work work +incdir+C:/Users/Administrator/Desktop/AC6103_EWAI/AC6103_ACM9767_DDS/src {C:/Users/Administrator/Desktop/AC6103_EWAI/AC6103_ACM9767_DDS/src/AC6103_ACM9767_DDS.v}
# Model Technology ModelSim ALTERA vlog 10.1d Compiler 2012.11 Nov  2 2012
# -- Compiling module AC6103_ACM9767_DDS
# 
# Top level modules:
# 	AC6103_ACM9767_DDS
# vlog -vlog01compat -work work +incdir+C:/Users/Administrator/Desktop/AC6103_EWAI/AC6103_ACM9767_DDS/prj/db {C:/Users/Administrator/Desktop/AC6103_EWAI/AC6103_ACM9767_DDS/prj/db/pll_altpll.v}
# Model Technology ModelSim ALTERA vlog 10.1d Compiler 2012.11 Nov  2 2012
# -- Compiling module pll_altpll
# 
# Top level modules:
# 	pll_altpll
# 
# vlog -vlog01compat -work work +incdir+C:/Users/Administrator/Desktop/AC6103_EWAI/AC6103_ACM9767_DDS/prj/../sim {C:/Users/Administrator/Desktop/AC6103_EWAI/AC6103_ACM9767_DDS/prj/../sim/AC6103_ACM9767_DDS_tb.v}
# Model Technology ModelSim ALTERA vlog 10.1d Compiler 2012.11 Nov  2 2012
# -- Compiling module AC6103_ACM9767_DDS_tb
# 
# Top level modules:
# 	AC6103_ACM9767_DDS_tb
# 
# vsim -t 1ps -L altera_ver -L lpm_ver -L sgate_ver -L altera_mf_ver -L altera_lnsim_ver -L cycloneive_ver -L rtl_work -L work -voptargs="+acc"  AC6103_ACM9767_DDS_tb
# vsim -L altera_ver -L lpm_ver -L sgate_ver -L altera_mf_ver -L altera_lnsim_ver -L cycloneive_ver -L rtl_work -L work -voptargs=\"+acc\" -t 1ps AC6103_ACM9767_DDS_tb 
# Loading work.AC6103_ACM9767_DDS_tb
# Loading work.AC6103_ACM9767_DDS
# Loading work.pll
# Loading altera_mf_ver.altpll
# Loading altera_mf_ver.ALTERA_DEVICE_FAMILIES
# Loading altera_mf_ver.pll_iobuf
# Loading work.key
# Loading work.key_filter
# Loading work.edge_check
# Loading work.DDS_Module
# Loading work.ddsrom0
# Loading altera_mf_ver.altsyncram
# Loading altera_mf_ver.ALTERA_MF_MEMORY_INITIALIZATION
# Loading work.ddsrom1
# Loading work.ddsrom2
# Loading altera_mf_ver.MF_cycloneiii_pll
# Loading altera_mf_ver.cda_m_cntr
# Loading altera_mf_ver.cda_n_cntr
# Loading altera_mf_ver.cda_scale_cntr
# ** Warning: (vsim-3017) C:/Users/Administrator/Desktop/AC6103_EWAI/AC6103_ACM9767_DDS/src/AC6103_ACM9767_DDS.v(52): [TFMPC] - Too few port connections. Expected 4, found 3.
# 
#         Region: /AC6103_ACM9767_DDS_tb/AC6103_ACM9767_DDS/PLL
# ** Warning: (vsim-3722) C:/Users/Administrator/Desktop/AC6103_EWAI/AC6103_ACM9767_DDS/src/AC6103_ACM9767_DDS.v(52): [TFMPC] - Missing connection for port 'areset'.
# 
# ** Warning: (vsim-3017) C:/Users/Administrator/Desktop/AC6103_EWAI/AC6103_ACM9767_DDS/src/AC6103_ACM9767_DDS.v(75): [TFMPC] - Too few port connections. Expected 9, found 8.
# 
#         Region: /AC6103_ACM9767_DDS_tb/AC6103_ACM9767_DDS/DDS_CHANEL_AB
# ** Warning: (vsim-3722) C:/Users/Administrator/Desktop/AC6103_EWAI/AC6103_ACM9767_DDS/src/AC6103_ACM9767_DDS.v(75): [TFMPC] - Missing connection for port 'DA_CLK'.
# 
# 
# add wave *
# view structure
# .main_pane.structure.interior.cs.body.struct
# view signals
# .main_pane.objects.interior.cs.body.tree
# run -all
#  Note : Cyclone IV E PLL locked to incoming clock
# Time: 60000  Instance: AC6103_ACM9767_DDS_tb.AC6103_ACM9767_DDS.PLL.altpll_component.cycloneiii_pll.pll3
# Break in Module AC6103_ACM9767_DDS_tb at C:/Users/Administrator/Desktop/AC6103_EWAI/AC6103_ACM9767_DDS/prj/../sim/AC6103_ACM9767_DDS_tb.v line 38
# Simulation Breakpoint: Break in Module AC6103_ACM9767_DDS_tb at C:/Users/Administrator/Desktop/AC6103_EWAI/AC6103_ACM9767_DDS/prj/../sim/AC6103_ACM9767_DDS_tb.v line 38
# MACRO ./AC6103_ACM9767_DDS_run_msim_rtl_verilog.do PAUSED at line 26
