| Hierarchy |
Input |
Constant Input |
Unused Input |
Floating Input |
Output |
Constant Output |
Unused Output |
Floating Output |
Bidir |
Constant Bidir |
Unused Bidir |
Input only Bidir |
Output only Bidir |
| i2s_tx|dac_fifo|dpram_inst |
52 |
1 |
0 |
1 |
32 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| i2s_tx|dac_fifo|async_fifo_ctrl_inst |
69 |
0 |
0 |
0 |
102 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| i2s_tx|dac_fifo |
37 |
0 |
0 |
0 |
34 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| i2s_tx |
37 |
0 |
0 |
0 |
2 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| i2s_rx|adc_fifo|dpram_inst |
52 |
1 |
0 |
1 |
32 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| i2s_rx|adc_fifo|async_fifo_ctrl_inst |
69 |
0 |
0 |
0 |
102 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| i2s_rx|adc_fifo |
37 |
0 |
0 |
0 |
34 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| i2s_rx |
6 |
0 |
0 |
0 |
33 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| WM8960_Init|I2C_Init_Dev|i2c_control|i2c_bit_shift |
17 |
0 |
0 |
0 |
11 |
0 |
0 |
0 |
1 |
0 |
0 |
0 |
0 |
| WM8960_Init|I2C_Init_Dev|i2c_control |
37 |
10 |
0 |
10 |
11 |
10 |
10 |
10 |
1 |
0 |
0 |
0 |
0 |
| WM8960_Init|I2C_Init_Dev|wm8960_init_table |
9 |
16 |
0 |
16 |
32 |
16 |
16 |
16 |
0 |
0 |
0 |
0 |
0 |
| WM8960_Init|I2C_Init_Dev |
3 |
0 |
0 |
0 |
2 |
0 |
0 |
0 |
1 |
0 |
0 |
0 |
0 |
| WM8960_Init |
2 |
0 |
0 |
0 |
2 |
0 |
0 |
0 |
1 |
0 |
0 |
0 |
0 |
| pll|altpll_component|auto_generated |
2 |
0 |
0 |
0 |
5 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| pll |
1 |
0 |
0 |
0 |
1 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |