m255
K3
13
cModel Technology
Z0 dF:\FPGA\Firmware\01_Project\Verilog\Debug\AC_I2C_Control\prj\simulation\modelsim
vi2c_bit_shift
Inkoa2zn^gRIfA?oD4dbnH1
VS6Y7FGDa6>>7nzfzSKe1]0
Z1 dF:\FPGA\Firmware\01_Project\Verilog\Debug\AC_I2C_Control\prj\simulation\modelsim
w1545902561
8F:/FPGA/Firmware/01_Project/Verilog/Debug/AC_I2C_Control/prj/i2c_bit_shift.v
FF:/FPGA/Firmware/01_Project/Verilog/Debug/AC_I2C_Control/prj/i2c_bit_shift.v
L0 1
Z2 OV;L;10.1d;51
r1
31
Z3 o-vlog01compat -work work -O0
Z4 !s92 -vlog01compat -work work +incdir+F:/FPGA/Firmware/01_Project/Verilog/Debug/AC_I2C_Control/prj -O0
!i10b 1
!s100 _0TEKW=FJ8kL_Y9]aEoWN0
!s85 0
!s108 1545968753.873000
!s107 F:/FPGA/Firmware/01_Project/Verilog/Debug/AC_I2C_Control/prj/i2c_bit_shift.v|
!s90 -reportprogress|300|-vlog01compat|-work|work|+incdir+F:/FPGA/Firmware/01_Project/Verilog/Debug/AC_I2C_Control/prj|-O0|F:/FPGA/Firmware/01_Project/Verilog/Debug/AC_I2C_Control/prj/i2c_bit_shift.v|
!s101 -O0
vi2c_control
IWlG[OjS6`H]hDMGHZ>=O:1
VD>2o0YJAfCIeLQMH`7E<N0
R1
w1545968750
8F:/FPGA/Firmware/01_Project/Verilog/Debug/AC_I2C_Control/prj/i2c_control.v
FF:/FPGA/Firmware/01_Project/Verilog/Debug/AC_I2C_Control/prj/i2c_control.v
L0 1
R2
r1
31
R3
R4
!i10b 1
!s100 [nhFz1@gCMH4SG<oW5><N0
!s85 0
!s108 1545968754.049000
!s107 F:/FPGA/Firmware/01_Project/Verilog/Debug/AC_I2C_Control/prj/i2c_control.v|
!s90 -reportprogress|300|-vlog01compat|-work|work|+incdir+F:/FPGA/Firmware/01_Project/Verilog/Debug/AC_I2C_Control/prj|-O0|F:/FPGA/Firmware/01_Project/Verilog/Debug/AC_I2C_Control/prj/i2c_control.v|
!s101 -O0
vi2c_control_tb
IhCZ33b_XT;0@cokRmnBk13
VjWM5:zl7LaGVjWIiE2Im^2
R1
w1545967978
8F:/FPGA/Firmware/01_Project/Verilog/Debug/AC_I2C_Control/prj/i2c_control_tb.v
FF:/FPGA/Firmware/01_Project/Verilog/Debug/AC_I2C_Control/prj/i2c_control_tb.v
L0 2
R2
r1
31
R3
R4
!i10b 1
!s100 M5U=50_31OzABjRJ_W@oG0
!s85 0
!s108 1545968754.229000
!s107 F:/FPGA/Firmware/01_Project/Verilog/Debug/AC_I2C_Control/prj/i2c_control_tb.v|
!s90 -reportprogress|300|-vlog01compat|-work|work|+incdir+F:/FPGA/Firmware/01_Project/Verilog/Debug/AC_I2C_Control/prj|-O0|F:/FPGA/Firmware/01_Project/Verilog/Debug/AC_I2C_Control/prj/i2c_control_tb.v|
!s101 -O0
vM24LC04B
!i10b 1
!s100 PUcXJ0<KFlTVM^]i@Ib1B2
IVHZ?Ck4L@eiMf>IPeTfSC3
Vk`GHkb:X`Z8Kg2@C5ODcQ0
R1
w1545544453
8F:/FPGA/Firmware/01_Project/Verilog/Debug/AC_I2C_Control/prj/M24LC04B.v
FF:/FPGA/Firmware/01_Project/Verilog/Debug/AC_I2C_Control/prj/M24LC04B.v
L0 85
R2
r1
!s85 0
31
!s108 1545968754.414000
!s107 F:/FPGA/Firmware/01_Project/Verilog/Debug/AC_I2C_Control/prj/M24LC04B.v|
!s90 -reportprogress|300|-vlog01compat|-work|work|+incdir+F:/FPGA/Firmware/01_Project/Verilog/Debug/AC_I2C_Control/prj|-O0|F:/FPGA/Firmware/01_Project/Verilog/Debug/AC_I2C_Control/prj/M24LC04B.v|
!s101 -O0
R3
R4
n@m24@l@c04@b
